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Using Jitterbug to Derive Control Loop Timing Requirements

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Author

Summary, in English

Linking scheduling attributes to control performance specifications is a difficult problem. This paper discusses how the MATLAB toolbox Jitterbug can be used to derive timing requirements for control loops from various control performance specifications. The resulting timing requirements include specifications on sampling periods, latencies, and jitter. An overview of the Jitterbug approach is given, and limitations of the tool are pointed out. A control design example is given, and, finally, topics where more research is needed are outlined.

Publishing year

2003

Language

English

Publication/Series

Proceedings of CERTS'03 – Co-Design of Embedded Real-Time Systems Workshop

Document type

Conference paper

Topic

  • Control Engineering

Status

Published