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Energy-Centric Scheduling for Real-Time Systems

Author

Summary, in English

Energy consumption is today an important design issue for all kinds of digital systems, and essential for the battery operated ones. An important fraction of this energy is dissipated on the processors running the application software. To reduce this energy consumption, one may, for instance, lower the processor clock frequency and supply voltage. This, however, might lead to a performance degradation of the whole system. In real-time systems, the crucial issue is timing, which is directly dependent on the system speed. Real-time scheduling and energy efficiency are therefore tightly connected issues, being addressed together in this work.



Several scheduling approaches for low energy are described in the thesis, most targeting variable speed processor architectures. At task level, a novel speed scheduling algorithm for tasks with probabilistic execution pattern is introduced and compared to an already existing compile-time approach. For task graphs, a list-scheduling based algorithm with an energy-sensitive priority is proposed. For task sets, off-line methods for computing the task maximum required speeds are described, both for rate-monotonic and earliest deadline first scheduling. Also, a run-time speed optimization policy based on slack re-distribution is proposed for rate-monotonic scheduling. Next, an energy-efficient extension of the earliest deadline first priority assignment policy is proposed, aimed at tasks with probabilistic execution time. Finally, scheduling is examined in conjunction with assignment of tasks to processors, as parts of various low energy design flows. For some of the algorithms given in the thesis, energy measurements were carried out on a real hardware platform containing a variable speed processor. The results confirm the validity of the initial assumptions and models used throughout the thesis. These experiments also show the efficiency of the newly introduced scheduling methods.

Publishing year

2002

Language

English

Document type

Dissertation

Publisher

Department of Computer Science, Lund University

Topic

  • Computer Science

Keywords

  • numerisk analys
  • Datalogi
  • Computer science
  • numerical analysis
  • System-Level Synthesis
  • Variable Speed Processors
  • Dynamic Voltage Scaling
  • Real-Time Scheduling
  • Energy Efficient Systems
  • control
  • systems
  • system
  • kontroll

Status

Published

Research group

  • ESDLAB

Supervisor

  • Krzysztof Kuchcinski

ISBN/ISSN/Other

  • ISBN: 91-628-5494-1

Defence date

17 December 2002

Defence time

13:15

Defence place

E:1406, E-huset, Lunds Tekniska Högskola

Opponent

  • Jan Madsen (Prof.)