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Modeling and exploration of a reconfigurable architecture for digital holographic imaging

Author

Summary, in English

The use of coarse-grain reconfigurable architectures (CGRA) is a suitable alternative for hardware acceleration in many application areas, including digital holographic imaging. In this paper, we propose a CGRA-based system with an array of processing and memory cells, which communicate using a local and a global communication network, and a stream memory controller to manage data transfers to external memory. We present our SystemC-based exploration environment (SCENIC) and methodology used to construct and evaluate systems containing reconfigurable architectures. A case study illustrates the advantages with rapid system level exploration to find and solve bottlenecks in complex designs prior to RTL description.

Publishing year

2008

Language

English

Pages

248-251

Publication/Series

[Host publication title missing]

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Conference name

IEEE International Symposium on Circuits and Systems (ISCAS), 2008

Conference date

2008-05-18 - 2008-05-21

Conference place

Seattle, United States

Status

Published

Research group

  • Digital ASIC

ISBN/ISSN/Other

  • ISBN: 978-1-4244-1683-7