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A GSM speech coder implemented on a customized processor architecture

Author

Summary, in English

- A GSM speech coder has been implemented

on a custom DSP using a system for design

of arbitrary processor architectures. The speech

coder has been generated from a high level description

to netlist. The design system allows implementation

in various technologies and a netlist

for Plessey gate array has been generated. Due

to the rigid specification of the speech coder, the

advantages of a custom DSP can not be fully utilized

and a result in clock cycles and ROM storage

comparable to a standard DSP is achieved.

Publishing year

1993

Language

English

Pages

235-238

Publication/Series

ISCAS '93, 1993 IEEE International Symposium on Circuits and Systems

Document type

Conference paper

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Conference name

IEEE International Symposium on Circuits and Systems (ISCAS), 1993

Conference date

1993-05-03 - 1993-05-06

Conference place

Chicago, United States

Status

Published

Research group

  • Elektronikkonstruktion

ISBN/ISSN/Other

  • ISBN: 0-7803-1281-3