Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip
Author
Summary, in English
Publishing year
2005
Language
English
Pages
403-409
Publication/Series
[Host publication title missing]
Document type
Conference paper
Publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
Topic
- Electrical Engineering, Electronic Engineering, Information Engineering
Keywords
- testing
- system-on-chip
- test access mechanism
- TAM
- bus structure
- test data transportation
Conference name
8th Euromicro Conference on Digital System Design DSD 2005
Conference date
2005-08-30 - 2005-09-03
Conference place
Porto, Portugal
Status
Published
ISBN/ISSN/Other
- ISBN: 0-7695-2433-8