Fault management in an IEEE P1687 (IJTAG) environment
Author
Summary, in English
To enable graceful degradation, fault management can be applied to handle eventual defects. Fault management include collection of error statuses from each of the processors, classify the defects, fault mark defective processors, schedule jobs on non-defective processors.
This tutorial consists of three parts. First, we will discuss the need of IEEE P1687 (IJTAG), a standardized mechanism to access embedded features. Second, we will discuss how to make use of IEEE P1697 for fault management. And, third, we will make a demonstration of a fault management solution that makes use of IEEE P1687.
Publishing year
2012
Language
English
Pages
7-7
Publication/Series
[Host publication title missing]
Full text
- Available as PDF - 79 kB
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Document type
Conference paper
Publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
Topic
- Electrical Engineering, Electronic Engineering, Information Engineering
Keywords
- IEEE 1687
- Reliability
- Fault management
- Aging
Conference name
2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems
Conference date
2012-04-18
Conference place
Tallinn, Estonia
Status
Published
Research group
- Digital ASIC
ISBN/ISSN/Other
- ISBN: 978-1-4244-9754-6