The browser you are using is not supported by this website. All versions of Internet Explorer are no longer supported, either by us or Microsoft (read more here: https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Please use a modern browser to fully experience our website, such as the newest versions of Edge, Chrome, Firefox or Safari etc.

Sign-Bit based architecture for OFDM acquisition for multiple-standards

På svenska

Author

Summary, in English

This paper presents a hardware mapping of an auto-correlator for Orthogonal Frequency Division Multiplexing stage for three radio standards: LTE, DVB-H, and IEEE 802.11n. Hardware cost is minimized by using only the sign bit in the autocorrelation function. The frequency offset estimation procedure is dramatically simplified by reducing the phase of the envelope to pi/2 resolution, which in turn reduces the need of specialized components. The architecture is synthesized towards a 65 nm low-leakage high threshold standard cell CMOS library. The 1-bit architecture reports an area reduction of 90% for memories, 56% for the logic and a power dissipation reduction of 35%, when compared to an identical 8-bit implementation. The approximate area occupied by the architecture is 0.03mm^2. Power simulations for IEEE 802.11n packet reports a power dissipation of 42uW.

Publishing year

2009

Language

English

Publication/Series

[Host publication title missing]

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • WLAN
  • DVB-H
  • LTE
  • multi-standard
  • Acquisition
  • Synchronization
  • VLSI
  • OFDM

Conference name

Norchip Conference, 2009

Conference date

2009-11-16 - 2009-11-17

Conference place

Trondheim, Norway

Status

Published

Project

  • Radiosystem: Multibase (EU, VÖ/OE)

Research group

  • Digital ASIC
  • Elektronikkonstruktion

ISBN/ISSN/Other

  • ISBN: 978-1-4244-4310-9