The browser you are using is not supported by this website. All versions of Internet Explorer are no longer supported, either by us or Microsoft (read more here: https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Please use a modern browser to fully experience our website, such as the newest versions of Edge, Chrome, Firefox or Safari etc.

Detailed behavioral modeling of bang-bang phase detectors

På svenska

Author

Summary, in English

In this paper, the metastability of current-mode logic (CML) latches and flip-flops is studied in detail. Based on the results of this analysis, a behavioral model of bang-bang phase detectors (BBPDs) is proposed, which is able to reliably capture the critical deadzone effect. The impact of jitter and of process, voltage and temperature variations on the BBPD behavior is also investigated. The proposed model can be used with advantage in the high-level design and verification of e.g. clock and data recovery (CDR) circuits

Publishing year

2006

Language

English

Pages

716-719

Publication/Series

IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2006.

Document type

Conference paper

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Status

Published

ISBN/ISSN/Other

  • ISBN: 1-4244-0387-1