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Accelerating signal processing algorithms in digital holography using an FPGA platform

Author

Summary, in English

This paper describes the implementation of a custom DSP system to accelerate image processing algorithms used in the field of digital holography. The system, implemented on an FPGA platform, is intended for real-time reconstruction of images captured on a large image sensor. Due to the large amount of processing information, it is not possible to perform a HDL simulation of a complete image reconstruction in reasonable time. Instead, a reconfigurable solution is being used for full scale image reconstruction, exhaustive testing of the functionality and for connecting the accelerator to external components, i.e. the image sensor, monitor output device and high-speed memory banks

Publishing year

2003

Language

English

Pages

387-390

Publication/Series

Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT)

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • hardware description language
  • HDL simulation
  • real-time image reconstruction
  • digital holography
  • FPGA platform
  • accelerate image processing algorithms
  • DSP system
  • digital signal processing
  • image sensor
  • field programmable gate arrays
  • external components

Conference name

IEEE International Conference on Field-Programmable Technology (FPT)

Conference date

2003-12-15 - 2003-12-17

Conference place

Tokyo, Japan

Status

Published

ISBN/ISSN/Other

  • ISBN: 0-7803-8320-6