DT Modeling of Clock Phase Noise Effects in LP CT Delta-Sigma ADCs with RZ Feedback
Author
Summary, in English
The performance of continuous-time (CT) Delta Sigma modulators is limited by their sensitivity to clock phase noise (PN). The clock PN-induced in-band noise (IBN) is dependent on the magnitude and frequency of both the desired in-band signals and the out-of-band signals, as well as the shape of the clock PN spectrum. This brief presents a discrete-time (DT) model of the dominant clock PN-induced errors. It enables fast and accurate simulations of the clock PN effects with arbitrary input signals, PN spectra, and noise-transfer functions. The model has been verified by CT simulations and measurements on a second-order low-pass CT Delta Sigma modulator with return-to-zero feedback. The flexibility and usefulness of the DT model are demonstrated, and the two dominant clock PN effects are compared by means of simulations with orthogonal frequency-division multiplexing input signals and various PN specifications.
Publishing year
2009
Language
English
Pages
530-534
Publication/Series
IEEE Transactions on Circuits and Systems II: Express Briefs
Volume
56
Issue
7
Document type
Journal article
Publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
Topic
- Electrical Engineering, Electronic Engineering, Information Engineering
Status
Published
Research group
- Analog RF
- Data converters & RF
ISBN/ISSN/Other
- ISSN: 1549-7747