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Test Scheduling and Scan-Chain Division Under Power Constraint

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Author

Summary, in English

An integrated technique for test scheduling and scan-chain division under power constraints is proposed in this paper. We demonstrate that optimal test time can be achieved for systems tested by an arbitrary number of tests per core using scan-chain division and we define an algorithm for it. The design of wrappers to allow different lengths of scan-chains per core is also outlined. We investigate the practical limitations of such wrapper design and make a worst case analysis that motivates our integrated test scheduling and scan-chain division algorithm. The efficiency and usefulness of our approach have been demonstrated with an industrial design.

Publishing year

2001

Language

English

Pages

259-259

Publication/Series

[Host publication title missing]

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • scan-chain
  • test scheduling
  • wrapper design
  • testing
  • embedded systems

Conference name

Tenth Asian Test Symposium ATS 2001

Conference date

2001-11-19 - 2001-11-21

Conference place

Kyoto, Japan

Status

Published

ISBN/ISSN/Other

  • ISSN: 1081-7735
  • ISBN: 0-7695-1378-6