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Reconfigurable cell array as enabler for supporting concurrent multiple standards in mobile terminals

Author

Summary, in English

This manuscript presents an reconfigurable architecture, suitable to process time synchronization for multiple OFDM standards. The proposed architecture is based on a coarse-grained reconfigurable cell array, and the different radio standards under analysis are IEEE 802.11n, 3GPP Long Term Evolution and Digital Video Broadcast for cellular devices. With the use of a 2-by-2 cell array, composed of two decoupled processing and memory pairs, two concurrent data streams from any two of three radio standards are supported. Dynamic configuration of the cell array enables run-time switching between different standards, and the underlying hardware resources are shared when concurrent streams are processed. The enhanced RISC architecture of the processor cells contributes to a high instruction level parallelism, where the close interactions between processing and memory cells meet the stringent real-time processing requirement. The proposed 2-by-2 cell array is synthesized using a 65nm low-power regular threshold standard cell CMOS library, which occupies 0.338mm2 area and has a maximum clock frequency of 534MHz. The reconfigurable cell array offers a high flexibility while uses 1.83 times more area when compared to a function identical ASIC solution.

Publishing year

2010

Language

English

Publication/Series

10th Swedish System-On-Chip Conference

Document type

Conference paper

Publisher

Swedish Chapter of IEEE Solid-State Circuits Society (SSCS)

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • OFDM
  • Synchronization.
  • Multi-standard
  • Reconfigurable cell array
  • CGRA

Conference name

Swedish System-on-Chip Conference 2010 (SSoCC'10)

Conference date

2010-05-03 - 2010-05-04

Conference place

Kolmården, Sweden

Status

Published

Research group

  • Digital ASIC