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Novel carry propagation in high-speed synchronous counters and dividers

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Author

  • Patrik Larsson
  • Jiren Yuan

Summary, in English

A high-speed binary counter and a divider using a new carry propagation scheme is presented. The critical logic depth is one and the maximum fan-in of gates can be reduced to two, independent of the number of bits in both the counter and the divider. The hardware grows linearly with the number of bits, making them well suited for a wide range of applications.

Publishing year

1993

Language

English

Pages

1457-1458

Publication/Series

Electronics Letters

Volume

29

Issue

16

Document type

Journal article

Publisher

IEE

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Status

Published

ISBN/ISSN/Other

  • ISSN: 1350-911X