A 1.8 GHz CMOS VCO with reduced phase noise

Summary, in English

A 2 V, 6 mA, 15% tuning range, 1.8 GHz VCO implemented in a standard 0.35 μm CMOS process is presented. The phase noise of the VCO has been greatly reduced by means of on-chip filters and one off-chip low frequency inductor. The phase noise measured at 3 MHz offset from the carrier is between -141.5 dBc/Hz and -138.5 dBc/Hz over the whole tuning range

• Author: Pietro Andreani; Henrik Sjöland
• Department/s: Department of Electrical and Information Technology
• Publishing year: 2001
• Language: English
• Pages: 121-122
• Publication/Series: 2001 Symposium on VLSI Circuits, 2001. Digest of Technical Papers.
• Full text: - 267 kB; Download statistics
• Links: http://ieeexplore.ieee.org/iel5/7437/20220/00934213.pdf; http://dx.doi.org/10.1109/VLSIC.2001.934213
• Document type: Conference paper
• Topic: Electrical Engineering, Electronic Engineering, Information Engineering
• Status: Published
• ISBN/ISSN/Other: ISBN: 4-89114-014-3