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Teaching digital HW-design by implementing a complete MP3 decoder

På svenska

Author

  • Hugo Hedberg
  • Thomas Lenart
  • Henrik Svensson
  • Peter Nilsson
  • Viktor Öwall

Summary, in English

This paper describes a project course that focuses on all the different stages in an ASIC design flow. The project starts at algorithm level, followed by architecture selection, netlist generation, down to physical layout, fabrication, and finally verification. The scope of the project, implementing a complete MP3 decoder in VHDL and sending it for fabrication, motivates the students to work hard towards a common goal

Publishing year

2003

Language

English

Pages

31-32

Publication/Series

[Host publication title missing]

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • VHSIC HDL
  • VHDL
  • very high speed integrated circuits
  • hardware description languages
  • educational courses
  • MP3 decoder
  • netlist generation
  • integrated circuit verification
  • integrated circuit fabrication
  • application specific integrated circuits
  • integrated circuits architecture selection
  • digital HW-design
  • teaching
  • project course
  • hardware design
  • ASIC design

Conference name

IEEE International Conference on Microelectronic Systems Education (MSE), 2003

Conference date

2003-06-01 - 2003-06-02

Conference place

Anaheim, CA, United States

Status

Published

Research group

  • Elektronikkonstruktion

ISBN/ISSN/Other

  • ISBN: 0-7695-1973-3