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A 1.8V transmitter for 10/100 Mbps Ethernet physical layer

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Author

  • Cheng Tao
  • Li Yang
  • Ning Li
  • Ping Lu

Summary, in English

A 0.18 mum 1.8 V CMOS transmitter for 10/100Mbps Ethernet physical layer standards is described in this paper. The circuit is substantively a current-steering digital-to-analog converter with 5-bit resolution, 125MHz sample rate and 4ns transition time. A novel latch circuit is designed, as well as a structure is provided to realize the accurate rise/fall time control of waveform

Publishing year

2005

Language

English

Pages

415-418

Publication/Series

[Host publication title missing]

Document type

Conference paper

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Conference name

The 6th International Conference on ASIC, ASICON 2005

Conference date

2005-10-24 - 2005-10-27

Conference place

Shanghai, China

Status

Published

ISBN/ISSN/Other

  • ISBN: 0-7803-9210-8