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Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution

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Author

  • Pietro Andreani
  • F. Bigongiari
  • Roberto Roncella
  • Roberto Saletti
  • Pierangelo Terreni
  • A. Bigongiari
  • M. Lippi

Summary, in English

An eight-channel, 1 ns bin-size, 23 b dynamic range, single-chip, multihit, time-to-digital converter (TDC) is presented in this paper. A new architecture mixing two previous TDC realizations has been adopted. The chip can execute common-start or common-stop operations on the trailing, leading, or both transitions of the input channels; it stores at least 32 events/channel with a double-hit resolution of 16 ns. A prototype of about 120 mm2 has been integrated into a double-metal, single-poly, n-well 1 μm CMOS process, and its performance has been compared to that of similar devices. Test results show that a differential nonlinearity error of ±1%, an integral nonlinearity less than 0.2 least significant hit (LSB), and a time resolution of 0.443 LSB-significantly better than those of comparable TDCs and very close to the theoretical limit of 0.408 LSB-have been achieved

Publishing year

1998

Language

English

Pages

650-656

Publication/Series

IEEE Journal of Solid-State Circuits

Volume

33

Issue

4

Document type

Journal article

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Status

Published

ISBN/ISSN/Other

  • ISSN: 0018-9200