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Design of low-power, 1GS/s throughput FFT processor for MIMO-OFDM UWB communication system

Author

Summary, in English

A new 8PBF structure for 64/128 flexible point FFT processor is proposed. The processor, which is based on 8*8*2 mixed radix algorithm, can deal with multiple inputs more efficiently for MIMO applications. The 8PFB structure efficiently brings the throughput of the processor up to 1GS/s and the chances of register reverse down, reducing the power dissipation remarkably. Meanwhile the modified shift-add algorithm can remove complex multipliers in the FFT processor.

Publishing year

2007

Language

English

Pages

2594-2597

Publication/Series

[Host publication title missing]

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Conference name

2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007

Conference date

2007-05-27 - 2007-05-30

Conference place

New Orleans, LA, United States

Status

Published

ISBN/ISSN/Other

  • ISBN: 1-4244-0920-9