Vertical wrap-gated nanowire transistors

Summary, in English

We present a process for fabricating a field-effect transistor based on vertically standing InAs nanowires and demonstrate initial device characteristics. The wires are grown by chemical beam epitaxy at lithographically defined locations. Wrap gates are formed around the base of the wires through a number of deposition and etch steps. The fabrication is based on standard III - V processing and includes no random elements or single nanowire manipulation.

• Author: Tomas Bryllert; Lars-Erik Wernersson; T Lowgren; Lars Samuelson
• Department/s: Solid State Physics; Department of Electrical and Information Technology
• Publishing year: 2006
• Language: English
• Pages: 227-230
• Publication/Series: Nanotechnology
• Volume: 17
• Issue: 11
• Links: http://dx.doi.org/10.1088/0957-4484/17/11/S01
• Document type: Journal article
• Publisher: IOP Publishing
• Topic: Nano Technology
• Status: Published
• ISBN/ISSN/Other: ISSN: 0957-4484