Stacking of heterostructures and metallic elements for a submicron resonant tunneling transistor
Author
Summary, in English
Publishing year
2002
Language
English
Publication/Series
7th International Conference on Nanometer-Scale Science and Technology and 21st European Conference on Surface Science
Document type
Conference paper
Publisher
Lund University
Topic
- Condensed Matter Physics
- Electrical Engineering, Electronic Engineering, Information Engineering
Keywords
- circuit simulations
- peak voltage
- simulation package
- stacking
- peak current
- heterostructures
- metallic elements
- submicron resonant tunneling transistor
- metal gate
- resonant tunneling double barrier heterostructures
- three dimensional resonant tunneling transistor
- current-voltage characteristics
- asymmetric gate
- 30 to 100 nm
- W-GaAs
Conference name
Proceedings of 7th International Conference on Nanometer-Scale Science and Technology and 21st European Conference on Surface Science (NANO-7/ECOSS-21)
Conference date
2002-06-24 - 2002-06-28
Conference place
Malmö, Sweden
Status
Published