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Graph Theoretic Approach for Scan Cell Reordering to Minimize Peak Shift Power

På svenska

Author

  • Jaynarayan T. Tudu
  • Erik Larsson
  • Virendra Singh
  • Hideo Fujiwara

Summary, in English

Scan circuit testing generally causes excessive switching activity compared to normal circuit operation. This excessive switching activity causes high peak and average power consumption. Higher peak power causes, supply voltage droop and excessive heat dissipation. This paper proposes a scan cell reordering methodology to minimize the peak power consumption during scan shift operation. The proposed methodology first formulate the problem as graph theoretic problem then solve it by a linear time heuristic. The experimental results show that the methodology is able to reduce up to 48% of peak power in compared to the solution provided by industrial tool.

Publishing year

2010

Language

English

Pages

73-78

Publication/Series

GLSVLSI '10 Proceedings of the 20th symposium on Great lakes symposium on VLSI

Document type

Conference paper

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Conference name

Great Lakes Symposium on VLSI (GLSVLSI'10), 2010

Conference date

2010-05-16 - 2010-05-18

Conference place

Providence, United States

Status

Published

ISBN/ISSN/Other

  • ISBN: 978-1-4503-0012-4