Nanowire field-effect transistor
Author
Summary, in English
A new processing scheme for the fabrication of sub-100-nm-gate-length vertical nanowire transistors has been developed. InAs transistors with an 11 x 11 nanowire matrix and 80 nm gate length have been realized by this process. The gate length is directly controlled via the thickness of the evaporated gate metal and is thus easily scalable. The demonstrated devices operate in depletion mode, and they show a maximum drive current of about 1 mA and a maximum transconductance of 0.52 mS at V-g = -0.5 V and V-d = 1 V.
Publishing year
2007
Language
English
Pages
2629-2631
Publication/Series
Japanese Journal of Applied Physics
Volume
46
Issue
4B
Document type
Journal article
Publisher
IOP Publishing
Topic
- Electrical Engineering, Electronic Engineering, Information Engineering
- Condensed Matter Physics
Keywords
- transistor
- wrap gate
- nanowire
- InAs
- MISFET
Status
Published
ISBN/ISSN/Other
- ISSN: 0021-4922