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Access Time Analysis for IEEE P1687

Author

  • Farrokh Ghani Zadegan
  • Urban Ingelsson
  • Gunnar Carlsson
  • Erik Larsson

Summary, in English

The IEEE P1687 (IJTAG) standard proposal aims at providing a standardized interface between the IEEE Standard 1149.1 test access port (TAP) and on-chip embedded test, debug and monitoring logic (instruments), such as scan-chains and temperature sensors. A key feature in P1687 is to include Segment Insertion Bits (SIBs) in the scan-path to allow flexibility both in designing the instrument access network and in scheduling the access to instruments. This paper presents algorithms to compute the overall access time (OAT) for a given P1687 network. The algorithms are based on analysis for flat and hierarchical network architectures, considering two access schedules, i.e. concurrent schedule and sequential schedule. In the analysis, two types of overhead are identified, i.e. network configuration data overhead and JTAG protocol overhead. The algorithms are implemented and employed in a parametric analysis and in experiments on realistic industrial designs.

Publishing year

2012

Language

English

Pages

1459-1472

Publication/Series

IEEE Transactions on Computers

Volume

61

Issue

10

Document type

Journal article

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Status

Published

Research group

  • Digital ASIC

ISBN/ISSN/Other

  • ISSN: 0018-9340