Enhancement of VCO Linearity and Phase Noise by Implementing Frequency Locked Loop
Author
Summary, in English
This paper investigates the on-chip implementation of a frequency locked loop (FLL) over a VCO that decreases the phase noise and linearizes the transfer function. Implementation of the FLL inside a PLL is also investigated and a possible application is highlighted. Design of a special kind of low noise frequency detector without a reference frequency (frequency-to-voltage converter), which is the most critical component of the FLL, is also presented in a 0.25 ¿m BiCMOS process. Linearization and approximately 15 dBc/Hz phase noise suppression is demonstrated over a moderate phase noise LC VCO with a center frequency of 10 GHz.
Publishing year
2007
Language
English
Pages
2593-2599
Publication/Series
EUROCON, 2007. The International Conference on "Computer as a Tool"
Links
Document type
Conference paper
Topic
- Electrical Engineering, Electronic Engineering, Information Engineering
Status
Published
ISBN/ISSN/Other
- ISBN: 978-1-4244-0813-9