Drive current and threshold voltage control in vertical InAs wrap-gate transistors

Summary, in English

Results on fabrication and DC-characterisation of vertical InAs nanowire wrap-gate field-effect transistor arrays with a gate length of 50 nm are presented. Each nanowire array was processed into a transistor with a systematic variation in a number of wires and wire diameter over the sample. Extensive studies have been performed on the influence of wire number and diameter on the transistor characteristics due to a high device yield (84%). In particular it is shown that the threshold voltage depends on the wire diameter, with a change in the order of 5 mV/nm. These results show the possibility of changing the transistor characteristics on the sample by altering the wire dimensions, still using only one patterning and growth sequence.

• Author: Carl Rehnstedt; Claes Thelander; Linus Fröberg; B J Ohlsson; Lars Samuelson; Lars-Erik Wernersson
• Department/s: Solid State Physics; Department of Electrical and Information Technology
• Publishing year: 2008
• Language: English
• Pages: 236-237
• Publication/Series: Electronics Letters
• Volume: 44
• Issue: 3
• Links: http://dx.doi.org/10.1049/el:20083188
• Document type: Journal article
• Publisher: IEE
• Topic: Electrical Engineering, Electronic Engineering, Information Engineering; Condensed Matter Physics
• Status: Published
• Research group: Nano
• ISBN/ISSN/Other: ISSN: 1350-911X