A non-feedback multiphase clock generator
Author
Summary, in English
Publishing year
2002
Language
English
Pages
389-392
Publication/Series
2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)
Document type
Conference paper
Publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
Topic
- Electrical Engineering, Electronic Engineering, Information Engineering
Keywords
- no feedback loop
- multiphase clock generator
- single-stage direct interpolation architecture
- 1/4 frequency divider
- 500 MHz to 1.5 GHz
- short-circuit current suppression interpolator
- 0.35 micron
- 3.3 V
- input clock frequency range
- CMOS process
Conference name
2002 IEEE International Symposium on Circuits and Systems
Conference date
2002-05-26 - 2002-05-29
Status
Published
ISBN/ISSN/Other
- ISBN: 0-7803-7448-7