A non-feedback multiphase clock generator using direct interpolation

Summary, in English

This paper presents a new multiphase clock generator using direct interpolators. No feedback loop is required. A single-stage direct interpolation architecture is proposed. A 1/4 frequency divider and a short-circuit current suppression interpolator are developed to achieve the precise interpolation. The circuit was fabricated in a standard 0.35μm, 3.3V CMOS process. The multiphase clock generator can operate in a wide range of input clock frequencies from 500 MHz to 1 GHz.

• Author: Yang Lixin; Zhou Yijun; Jiren Yuan
• Department/s: Department of Electrical and Information Technology
• Publishing year: 2002
• Language: English
• Pages: 340-343
• Publication/Series: 2002 45th Midwest Symposium on Circuits and Systems, vol 1, Conference Proceedings
• Volume: 1
• Links: http://ieeexplore.ieee.org/iel5/8452/26619/01187226.pdf
• Document type: Conference paper
• Publisher: IEEE - Institute of Electrical and Electronics Engineers Inc.
• Topic: Electrical Engineering, Electronic Engineering, Information Engineering
• Keywords: Multiphase clock generators
• Conference name: 2002 45th Midwest Symposium on Circuits and Systems
• Conference date: 2002-08-04 - 2002-08-07
• Conference place: Tulsa, OK, United States
• Status: Published
• ISBN/ISSN/Other: ISBN: 0-7803-7523-8; CODEN: MSCSDL