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A Reconfigurable Power-conscious Core Wrapper and its Application to SOC Test Scheduling

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Author

Summary, in English

This paper presents a novel reconfigurable powerconscious core test wrapper and discusses its application to optimal power-constrained SOC (system-on-chip) test scheduling. The advantage with the proposed wrapper is that at each core it allows (1) a exible TAM (test access mechanism) bandwidths, and (2) a possibility to select the appropriate test power consumption. Our scheduling technique, an extension of a preemptive scheduling approach,produces optimal solutions in respect to test time, and selects wrapper configurations in a systematic way that implicitly minimizes the TAM routing and the wrapper logic. Experimental results show the efficiency of our approach.

Publishing year

2003

Language

English

Pages

1135-1135

Publication/Series

[Host publication title missing]

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • test access mechanisms
  • TAM
  • test scheduling
  • wrapper configuration
  • TAM routing
  • wrapper logic
  • test power consumption
  • preemptive scheduling

Conference name

International Test Conference ITC 2003

Conference date

2003-09-30 - 2003-10-02

Conference place

Charlotte, NC, United States

Status

Published