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Reduced impact of induced gate noise on inductively degenerated LNAs in deep submicron CMOS technologies

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Author

Summary, in English

Designers of radio-frequency inductively-degenerated CMOS low-noise-amplifiers have usually not followed the guidelines for achieving minimum noise figure. Nonetheless, state-of-the- art implementations display noise figure values very close to the theoretical minimum. In this paper, we point out that this is due to the effect of the parasitic overlap capacitances in the MOS device. In particular, we show that overlap capacitances lead to a significant induced-gate-noise reduction, especially when deep sub-micron CMOS processes are used.

Publishing year

2005

Language

English

Pages

31-36

Publication/Series

Analog Integrated Circuits and Signal Processing

Volume

42

Issue

1

Document type

Journal article

Publisher

Springer

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Status

Published

ISBN/ISSN/Other

  • ISSN: 0925-1030