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Portable digital clock generator for digital signal processing applications

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Author

  • Thomas Olsson
  • Peter Nilsson

Summary, in English

A fully integrated clock generator with behaviour similar to a PLL is proposed. A free-running ring oscillator is used as internal clock and the output clock is generated using two counters. The clock generator is described in synthesisable VHDL-code and can therefore easily be made from standard cells found in any commercial standard CMOS cell library.

Publishing year

2003

Language

English

Pages

1372-1374

Publication/Series

Electronics Letters

Volume

39

Issue

19

Document type

Journal article

Publisher

IEE

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Status

Published

Research group

  • Elektronikkonstruktion

ISBN/ISSN/Other

  • ISSN: 1350-911X