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Xilinx Virtex II Pro implementation of a reconfigurable UMTS digital channel filter

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Author

  • J Chandran
  • R Kaluri
  • Jugdutt Singh
  • Viktor Öwall
  • Ronny Veljanovski

Summary, in English

A reconfigurable digital root raised cosine (RRC) filter for a UMTS terrestrial radio access (UTRA) mobile terminal receiver is implemented on a Xilinx Vitrex II Pro Field Programmable Gate Array (FPGA). The filter employs a finite impulse response (FIR) and monitors in-band and out-of-band received signal powers and calculates the appropriate filter length that meets the bit-energy to interference ratio (Eb/No) of the system. The results presented are for the time division duplex (TDD) mode of UTRA.

Publishing year

2004

Language

English

Pages

77-82

Publication/Series

[Host publication title missing]

Document type

Conference paper

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Conference name

IEEE International Workshop on Electronic Design, Test and Applications (DELTA)

Conference date

2004-01-28 - 2004-01-30

Conference place

Perth, Australia

Status

Published

ISBN/ISSN/Other

  • ISBN: 0-7695-2081-2