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Java bytecode to hardware made easy with Bluespec System Verilog

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Author

Summary, in English

This paper presents a method for translation of Java bytecode sequences into synthesizable hardware, using the Bluespec System Verilog (BSV) environment. At the core of our approach lies a BSV description of a subset of Java bytecodes, that can be used to directly translate bytecode sequences into a BSV specification. The result is intended as an accelerator for existing Java processors (JOP, BlueJEP) or even standalone hardware. Preliminary evaluation shows our solution to produce hardware on par with established methods (area/performance), while supporting rare features (e.g. easy to automate, method calls and recursion).

Publishing year

2012

Language

English

Pages

80-87

Publication/Series

JTRES '12. Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems

Document type

Conference paper

Publisher

Association for Computing Machinery (ACM)

Topic

  • Computer Science

Keywords

  • embedded systems
  • Java bytecode
  • Bluespec

Conference name

JTRES '12 10th International Workshop on Java Technologies for Real-time and Embedded Systems

Conference date

2012-10-24

Conference place

Copenhagen, Denmark

Status

Published

Research group

  • ESDLAB

ISBN/ISSN/Other

  • ISBN: 978-1-4503-1688-0