An adaptive impedance tuning CMOS circuit for ISM 2.4-GHz band
Author
Summary, in English
The difficulties encountered in matching an antenna to its optimal impedance are reduced with an adaptive 0.35-mu m CMOS circuit based on several switched shunt capacitors arranged in capacitor banks and on a few external series inductors. As high-quality inductors are difficult to obtain in CMOS, the inductors are placed either in an low-temperature cofired ceramic (LTCC) substrate or is a lumped component outside the core circuit. The circuits, presented here through a range of simulations, are optimized to function within the ISM 2.4-GHz band, but the general approach employed to improve matching can be used for other frequency bands as well. The circuits discussed provide a VSWR <= 2 match for every impedance with VSWR <= 5. There is a 1-dB power loss for a perfect 50 Omega -> 50 Omega transformation, a break-even point at VSWR = 1.5, and a 3-dB increase in delivered power for VSWR = 4.3.
Publishing year
2005
Language
English
Pages
1115-1124
Publication/Series
IEEE Transactions on Circuits and Systems Part 1: Fundamental Theory and Applications
Volume
52
Issue
6
Document type
Journal article
Publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
Topic
- Electrical Engineering, Electronic Engineering, Information Engineering
Keywords
- CMOS
- antenna tuning unit (ATU)
- impedance matching
- impedance tuning
- reconfigurable matching
- unit (ITU)
- ISM
- capacitor
- bank
- switched capacitor
Status
Published
ISBN/ISSN/Other
- ISSN: 1057-7122