60 GHz 130-nm CMOS Second Harmonic Power Amplifiers
Author
Summary, in English
have been measured, one with differential and one with singleended input, both with single-ended output at 60 GHz. The amplifiers have been implemented in a 1p8M 130-nm CMOS process. The resonant nodes are tuned to 30 GHz or 60 GHz using on-chip transmission lines, which have been simulated in ADS and Momentum.
The measured input impedance of the single-ended PA is high at 250 Ω, and the differential input is similar, making the PA a suitable load for an oscillator in a fully integrated transmitter.
The single-ended and differential input PA delivers 1 dBm and 3 dBm, respectively, of measured saturated output power to 50 Ω, both with a drain efficiency of 8%.
Publishing year
2008
Language
English
Pages
300-303
Publication/Series
2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2008), Vols 1-4
Full text
Document type
Conference paper
Publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
Topic
- Electrical Engineering, Electronic Engineering, Information Engineering
Keywords
- Power Amplifier
- 60 GHz
- CMOS
Conference name
2008 IEEE Asia Pacific Conference on Circuits and Systems - APCCAS 2008
Conference date
2008-11-30 - 2008-12-03
Conference place
Macao, China
Status
Published
Research group
- Elektronikkonstruktion
- Analog RF