The browser you are using is not supported by this website. All versions of Internet Explorer are no longer supported, either by us or Microsoft (read more here: https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Please use a modern browser to fully experience our website, such as the newest versions of Edge, Chrome, Firefox or Safari etc.

System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors

Author

Summary, in English

This paper focuses on system-level design methods for low energy consumption in architectures employing variable-voltage processors. Two lowenergy design flows are introduced. The first, Speed-up and Stretch, is based on

the performance vs. low-energy design trade-off. The second, Eye-on-Energy, is based on energy sensitive scheduling and assignment techniques. Both of the

approaches presented in this paper use simulated annealing to generate task-toprocessor assignments. Also, both use list-scheduling based methods for scheduling.

The set of experiments presented here characterize the newly introduced approaches, while giving an idea about the cost vs. low-energy and performance vs. low-energy design trade-offs a designer has to make.

Publishing year

2000

Language

English

Pages

1-12

Publication/Series

Lecture Notes in Computer Science

Volume

2008

Document type

Book chapter

Publisher

Springer

Topic

  • Computer Science

Keywords

  • variable voltage processors
  • low energy
  • system-level design

Status

Published

Research group

  • ESDLAB

ISBN/ISSN/Other

  • ISSN: 0302-9743
  • ISSN: 1611-3349