The browser you are using is not supported by this website. All versions of Internet Explorer are no longer supported, either by us or Microsoft (read more here: https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Please use a modern browser to fully experience our website, such as the newest versions of Edge, Chrome, Firefox or Safari etc.

Power consumption in digital filter architectures in 65 nm CMOS technology

Author

Publishing year

2010

Language

English

Document type

Conference paper

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Conference name

GigaHertz Symposium, 2010

Conference date

2010-03-09 - 2010-03-10

Conference place

Lund, Sweden

Status

Published

Research group

  • Digital ASIC