The browser you are using is not supported by this website. All versions of Internet Explorer are no longer supported, either by us or Microsoft (read more here: https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Please use a modern browser to fully experience our website, such as the newest versions of Edge, Chrome, Firefox or Safari etc.

Extrinsic and Intrinsic Performance of Vertical InAs Nanowire MOSFETs on Si Substrates

Author

Summary, in English

This paper presents DC and RF characterization as

well as modeling of vertical InAs nanowire MOSFETs with LG =

200 nm and Al2O3/HfO2 high-κ dielectric. Measurements at VDS =

0.5 V show that high transconductance (gm = 1.37 mS/μm), high

drive current (IDS = 1.34 mA/μm), and low on-resistance (RON =

287 Ωμm) can be realized using vertical InAs nanowires on Si

substrates. By measuring the 1/f-noise, the gate area normalized

gate voltage noise spectral density, SVG·LG·WG, is determined to

be lowered one order of magnitude compared to similar devices

with a high-κ film consisting of HfO2 only. Additionally, with a

virtual source model we are able to determine the intrinsic

transport properties. These devices (LG = 200 nm) show a high

injection velocity (vinj = 1.7·107 cm/s) with a performance

degradation for array FETs predominantly due to an increase in

series resistance.

Publishing year

2013

Language

English

Pages

2761-2767

Publication/Series

IEEE Transactions on Electron Devices

Volume

60

Issue

9

Document type

Journal article

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering
  • Condensed Matter Physics

Keywords

  • MOSFET
  • RF
  • InAs
  • Nanowire (NW)

Status

Published

Project

  • EIT_WWW Wireless with Wires

Research group

  • Nano

ISBN/ISSN/Other

  • ISSN: 0018-9383