Reducing the Complexity of LDPC Decoding Algorithms: An Optimization-Oriented Approach
Author
Summary, in English
framework for reducing the computational complexity of LDPC
decoders. Subject to specified performance constraints and
adaptive to environment conditions, the proposed framework
leverages the adjustable performance-complexity tradeoffs of
the decoder to deliver satisfying performance with minimum
computational complexity. More specifically, two constraint scenarios
are studied: the “good-enough” performance and “as good-
as-possible performance”. Moreover, we also investigate the
effects of different degrees of freedom in performance-complexity
tradeoff adjustments. The effectiveness of the proposed method
has been verified by simulating a set of LDPC codes used in IEEE
802.11 and IEEE 802.16 standards. Computational complexity
reductions of up to 35% have been observed.
Department/s
Publishing year
2015
Language
English
Publication/Series
2014 IEEE 25th Annual International Symposium on Personal, Indoor, and Mobile Radio Communication (PIMRC)
Full text
- Available as PDF - 594 kB
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Document type
Conference paper
Publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
Topic
- Telecommunications
- Other Electrical Engineering, Electronic Engineering, Information Engineering
Keywords
- Reduced complexity
- LDPC codes
- forced convergence
Conference name
IEEE 25th International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), 2014
Conference date
2014-09-02 - 2014-09-05
Conference place
Washington DC, United States
Status
Published
Project
- EIT_DARE Digitally-Assisted Radio Evolution
Research group
- Integrated Electronic Systems
- Communications Engineering
- Digital ASIC
- Radio Systems
ISBN/ISSN/Other
- ISBN: 978-1-4799-4912-0