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III-V Nanowire Complementary Metal-Oxide Semiconductor Transistors Monolithically Integrated on Si

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Author

Summary, in English

III-V semiconductors have attractive transport properties suitable for low-power, high-speed complementary metal oxide-semiconductor (CMOS) implementation, but major challenges related to cointegration of III-V n- and p-type metal-oxide-semiconductor field-effect transistors (MOSFETs) on low-cost Si substrates have so far hindered their use for large scale logic circuits. By using a novel approach to grow both InAs and InAs/GaSb vertical nanowires of equal length simultaneously in one single growth step, we here demonstrate n- and p-type III-V MOSFETs monolithically integrated on a Si substrate with high I-on/I-off ratios using a dual channel, single gate-stack design processed simultaneously for both types of transistors. In addition, we demonstrate fundamental CMOS logic gates, such as inverters and NAND gates, which illustrate the viability of our approach for large scale III-V MOSFET circuits on Si.

Publishing year

2015

Language

English

Pages

7898-7904

Publication/Series

Nano Letters

Volume

15

Issue

12

Document type

Journal article

Publisher

The American Chemical Society (ACS)

Topic

  • Nano Technology
  • Other Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • III-V
  • CMOS
  • nanowire
  • inverter
  • NAND
  • InAs
  • GaSb
  • low-power logic
  • Si

Status

Published

ISBN/ISSN/Other

  • ISSN: 1530-6992