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Performance evaluation of N-well/P-sub photodiodes in 65nm CMOS process

Author

Summary, in English

This work explores the n-well/p-substrate photodiode in a deep submicron CMOS process. A CMOS chip is designed featuring different structures of the photodiode. When characterized at a wavelength of 850nm DC responsivities between 0.12 and 0.16 A/W and 3-dB bandwidths of about 6 MHz with a roll-off of about 5.5dB/decade are measured. These investigations are very useful in designing the transimpedance amplifier and equalizer for a fully integrated optical receiver. According to the authors’ knowledge it is the first reported study on n-well/p-sub photodiodes in a 65nm CMOS technology.

Publishing year

2013

Language

English

Pages

135-136

Publication/Series

[Host publication title missing]

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • photodiodes
  • optical communication
  • CMOS technology
  • optical receivers
  • photodetectors

Conference name

6th IEEE/International Conference on Advanced Infocomm Technology (ICAIT)

Conference date

2013-07-06 - 2013-07-09

Conference place

Hsinchu, Taiwan

Status

Published

Project

  • Distributed antenna systems for efficient wireless systems

Research group

  • Analog RF

ISBN/ISSN/Other

  • ISBN: 978-1-4799-0464-8