Synthesizing hardware from dataflow programs
Author
Summary, in English
Abstract in Undetermined
The MPEG Reconfigurable Video Coding
working group is developing a new library-based pro-
cess for building the reference codecs of future MPEG
standards, which is based on dataflow and uses an actor
language called Cal. The paper presents a code genera-
tor producing RTL targeting FPGAs for Cal, outlines
its structure, and demonstrates its performance on an
MPEG-4 Simple Profile decoder. The resulting imple-
mentation is smaller and faster than a comparable RTL
reference design, and the second half of the paper
discusses some of the reasons for this counter-intuitive
result.
The MPEG Reconfigurable Video Coding
working group is developing a new library-based pro-
cess for building the reference codecs of future MPEG
standards, which is based on dataflow and uses an actor
language called Cal. The paper presents a code genera-
tor producing RTL targeting FPGAs for Cal, outlines
its structure, and demonstrates its performance on an
MPEG-4 Simple Profile decoder. The resulting imple-
mentation is smaller and faster than a comparable RTL
reference design, and the second half of the paper
discusses some of the reasons for this counter-intuitive
result.
Publishing year
2011
Language
English
Pages
241-249
Publication/Series
Journal of Signal Processing Systems
Volume
63
Issue
2
Full text
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Document type
Journal article
Publisher
Springer
Topic
- Computer Science
Status
Published
Research group
- EDSLab
ISBN/ISSN/Other
- ISSN: 1939-8115