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Highly linear direct conversion receiver using customized on-chip balun

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Author

Summary, in English

This paper presents a highly linear radio frequency receiver front-end with on-chip balun for cellular application at 2GHz in 65nm CMOS technology. Based on direct conversion architecture, the implemented front-end comprises a customized on-chip balun for single-ended to differential signal conversion, a differential common-gate low noise amplifier and voltage mode quadrature passive mixer. The simulated in-band compression point is -0.5dBm and third order input intercept point is +6.2dBm. An out-of-band blocker compression point up to +4.8dBm and third order input intercept point of +16dBm are achieved thanks to the frequency translation filtering technique. The low-noise amplifier consumes 3mA current using 1.8V supply. The overall noise figure including balun loss, low-noise amplifier, mixer and a simplified model of a baseband filter is 3.8dB.

Publishing year

2011

Language

English

Publication/Series

[Host publication title missing]

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Conference name

29th Norchip conference, 2011

Conference date

2011-11-14 - 2011-11-15

Conference place

Lund, Sweden

Status

Published

Research group

  • Analog RF

ISBN/ISSN/Other

  • ISBN: 978-1-4577-0514-4
  • E-ISBN 978-1-4577-0515-1