FPGA Based Engine Feedback Control Algorithms
Author
Summary, in English
High resolution real time heat release analysis will become increasingly important
in the future development of engine control systems. The increased demands on efficiency
and emissions will put high demands on future engine control. Future engine concepts, for example
the HCCI engine concept might crave cylinder pressure based Closed-Loop Combustion
Control (CLCC). The analysis of cylinder pressure is a relatively computationally expensive
task that is difficult to implement in existing engine controllers due to the real time demands.
This paper describes an approach to obtain such a high speed heat release analysis. The described
system could act as a platform for further feedback control experiments. An experimental
setup is put together. The heat release algorithm is then developed using MATLAB and
SIMULINK. The emerging environment will serve as a prototyping system that can be used for
further development of advanced cylinder pressure based feedback control strategies. The performance
of the developed algorithm/system is examined in a simulated engine environment.
The heart of the system is a Field Programmable Gate Array (FPGA), an FPGA is best described
as an reconfigurable Application Specific Integrated Circuit (ASIC). The usage of an
FPGA gives the possibility of very high throughput and very low delay time and jitter of the
final system.
This system could of course also be developed using a normal Commersial Of The Shelf (COTS)
processor and a Real Time Operating System (RTOS). The high performance that would be
needed to calculate the heat release in the desired time in a multi cylinder engine would however
put high demands on the used processor; hence the price of the processor might make the
system too expensive, the FPGA describes an alternative approach.
in the future development of engine control systems. The increased demands on efficiency
and emissions will put high demands on future engine control. Future engine concepts, for example
the HCCI engine concept might crave cylinder pressure based Closed-Loop Combustion
Control (CLCC). The analysis of cylinder pressure is a relatively computationally expensive
task that is difficult to implement in existing engine controllers due to the real time demands.
This paper describes an approach to obtain such a high speed heat release analysis. The described
system could act as a platform for further feedback control experiments. An experimental
setup is put together. The heat release algorithm is then developed using MATLAB and
SIMULINK. The emerging environment will serve as a prototyping system that can be used for
further development of advanced cylinder pressure based feedback control strategies. The performance
of the developed algorithm/system is examined in a simulated engine environment.
The heart of the system is a Field Programmable Gate Array (FPGA), an FPGA is best described
as an reconfigurable Application Specific Integrated Circuit (ASIC). The usage of an
FPGA gives the possibility of very high throughput and very low delay time and jitter of the
final system.
This system could of course also be developed using a normal Commersial Of The Shelf (COTS)
processor and a Real Time Operating System (RTOS). The high performance that would be
needed to calculate the heat release in the desired time in a multi cylinder engine would however
put high demands on the used processor; hence the price of the processor might make the
system too expensive, the FPGA describes an alternative approach.
Department/s
Publishing year
2006
Language
English
Publication/Series
FISITA 2006 World Automotive Congress
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Document type
Conference paper
Publisher
JSAE
Topic
- Other Mechanical Engineering
Keywords
- Heat release analysis
- Engine control
- ASIC
- FPGA
Status
Published
Project
- Competence Centre for Combustion Processes