The browser you are using is not supported by this website. All versions of Internet Explorer are no longer supported, either by us or Microsoft (read more here: https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Please use a modern browser to fully experience our website, such as the newest versions of Edge, Chrome, Firefox or Safari etc.

Power Constrained Preemptive TAM Scheduling

På svenska

Author

Summary, in English

We integrate scan-chain partitioning and preemptive test access mechanism (TAM) scheduling for core-based systems under power constraint. We also outline a flexible power conscious test wrapper to increase the flexibility in the scheduling process by (1) allowing several different bandwidths at cores and (2) controlling the cores test power consumption, which makes it possible to increase the test clock. We model the scheduling problem as a Bin-packing problem and we discuss the transformations: (1) TAM-time and (2) power-time and the possibilities to achieve an optimal solution and the limitations. We have implemented our proposed preemptive TAM scheduling algorithm and through experiments we demonstrate its efficiency.

Publishing year

2002

Language

English

Pages

119-119

Publication/Series

[Host publication title missing]

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • scan-chain partitioning
  • core-based systems
  • power constraint
  • test access mechanism
  • TAM
  • preemptive TAM scheduling

Conference name

7th IEEE European Test Workshop,2002

Conference date

2002-05-26 - 2002-05-29

Conference place

Corfu, Greece

Status

Published

ISBN/ISSN/Other

  • ISSN: 1530-1877
  • ISBN: 0-7695-1715-3