Code Generation for a SIMD Architecture with Custom Memory Organisation

Summary, in English

Today’s multimedia and DSP applications impose requirements on performance and power consumption that only custom processor architectures with SIMD capabilities can satisfy. However, the specific features of such architectures, including vector operations and high-bandwidth complex memory organization, make them notoriously complicated and time consuming to program. In this paper we present an automated code generation approach that dramatically reduces the effort of programming such architectures, by carrying out instruction scheduling and memory allocation based on a constraint programming formulation. Furthermore, the quality of the generated code is close to that of hand-written code by an experienced programmer with knowledge of the architecture. We demonstrate the viability of our approach on an existing custom heterogeneous DSP architecture, by compiling and running a number of typical DSP kernels, and comparing the results to hand-optimized code.

• Author: Mehmet Ali Arslan; Flavius Gruian; Krzysztof Kuchcinski; Andreas Karlsson
• Department/s: Department of Computer Science; ELLIIT: the Linköping-Lund initiative on IT and mobile communication; Parallel Systems
• Publishing year: 2017
• Language: English
• Pages: 90-97
• Publication/Series: 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP)
• Links: http://dx.doi.org/10.1109/DASIP.2016.7853802
• Document type: Conference paper
• Publisher: IEEE - Institute of Electrical and Electronics Engineers Inc.
• Topic: Embedded Systems; Computer Science
• Conference name: Conference on Design & Architectures for Signal & Image Processing (DASIP 2016)
• Conference date: 2016-10-12 - 2016-10-14
• Conference place: Rennes, France
• Status: Published
• ISBN/ISSN/Other: ISBN: 979-1-0922-7915-3