The browser you are using is not supported by this website. All versions of Internet Explorer are no longer supported, either by us or Microsoft (read more here: https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Please use a modern browser to fully experience our website, such as the newest versions of Edge, Chrome, Firefox or Safari etc.

Class-D CMOS Oscillators

På svenska

Author

Summary, in English

This paper presents class-D CMOS oscillators capable of an excellent phase noise performance from a very low power supply voltage. Starting from the recognition of the time-variant nature of the class-D LC tank, accurate expressions of the oscillation frequency, oscillation amplitude, current consumption, phase noise, and figure-of-merit (FoM) have been derived. Compared with the commonly used class-B/C architectures, the optimal class-D oscillator produces less phase noise for the same power consumption, at the expense of a higher power supply pushing. A prototype of a class-D voltage-controlled oscillator (VCO) targeted for mobile applications, implemented in a standard 65-nm CMOS process, covers a 46% tuning range between 3.0 and 4.8 GHz; drawing 10 mA from 0.4 V, the phase noise at 10-MHz offset from 4.8 GHz is -143.5 dBc/Hz, for an FoM of 191 dBc/Hz with less than 1-dB variation across the tuning range. A version of the same VCO with a resonant tail filter displays a lower 1/f(3) phase-noise corner and improves the FoM by 1 dB.

Publishing year

2013

Language

English

Pages

3105-3119

Publication/Series

IEEE Journal of Solid-State Circuits

Volume

48

Issue

12

Document type

Journal article

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Electrical Engineering, Electronic Engineering, Information Engineering

Keywords

  • Class-D
  • CMOS
  • high efficiency
  • low phase noise
  • low-voltage
  • voltage-controlled oscillator (VCO)

Status

Published

ISBN/ISSN/Other

  • ISSN: 0018-9200