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Masked Depth Culling for Graphics Hardware

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Author

Summary, in English

Hierarchical depth culling is an important optimization, which is present in all modern high performance graphics processors. We present a novel culling algorithm based on a layered depth representation, with a per-sample mask indicating which layer each sample belongs to. Our algorithm is feed forward in nature in contrast to previous work, which rely on a delayed feedback loop. It is simple to implement and has fewer constraints than competing algorithms, which makes it easier to load-balance a hardware architecture. Compared to previous work our algorithm performs very well, and it will often reach over 90% of the efficiency of an optimal culling oracle. Furthermore, we can reduce bandwidth by up to 16% by compressing the hierarchical depth buffer.

Publishing year

2015

Language

English

Publication/Series

ACM Transactions on Graphics (TOG)

Volume

34

Issue

6

Document type

Conference paper

Publisher

Association for Computing Machinery (ACM)

Topic

  • Computer and Information Science

Conference name

SIGGRAPH Asia

Conference date

2015-11-02

Conference place

Kobe, Japan

Status

Published

ISBN/ISSN/Other

  • ISSN: 0730-0301