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Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures

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Author

  • Christophe Wolinski
  • Krzysztof Kuchcinski
  • Jürgen Teich
  • Frank Hannig

Summary, in English

In this paper, we present a constraint programming-based approach for optimization of routing and reconfiguration overhead for a class of reconfigurable processor array architectures called weakly programmable. For a given set of different algorithms the execution of which is supposed to be switched upon request at run-time, we provide static solutions for optimal routing of data between processor elements as well as for minimization of the routing area and the reconfiguration overhead when switching between the execution of these algorithms. Our experiments confirm that our method can minimize routing overhead and reduce reconfiguration time significantly.

Publishing year

2008-12-22

Language

English

Pages

306-309

Publication/Series

16th International Symposium on Field-Programmable Custom Computing Machines, 2008. FCCM '08.

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Computer Science

Conference name

16th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM)

Conference date

2008-04-14 - 2008-04-15

Conference place

Palo Alto, CA, United States

Status

Published

ISBN/ISSN/Other

  • ISBN: 978-0-7695-3307-0