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Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures

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Author

  • Christophe Wolinski
  • Krzysztof Kuchcinski
  • Jürgen Teich
  • Frank Hannig

Summary, in English

In this paper, we introduce a constraint programming-based approach for optimization of routing and reconfiguration overhead for a class of reconfigurable processor array architectures called weakly programmable. For a given set of different algorithms the execution of which is supposed to be switched upon request at run-time, we provide static solutions for optimal routing of data between processors as well as for minimization of the routing area and the reconfiguration overhead when switching between the execution of these algorithms. In fact, applying the switching can be accomplished in just a few clock cycles. Our experiments confirm that our method can minimize routing overhead and reduce reconfiguration time significantly.

Publishing year

2008

Language

English

Pages

345-352

Publication/Series

11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

Document type

Conference paper

Publisher

IEEE - Institute of Electrical and Electronics Engineers Inc.

Topic

  • Computer Science

Conference name

11th Euromicro conference on Digital System Design (DSD)

Conference date

2008-09-03 - 2008-09-05

Conference place

Parma, Italy

Status

Published

ISBN/ISSN/Other

  • ISBN: 978-0-7695-3277-6