Programming support for reconfigurable custom vector architectures

Summary, in English

High performance requirements increased the popularity of unconventional architectures. While providing better performance, such architectures are generally harder to program and generate code for. In this paper, we present our approach to ease programmability and code generation for such architectures. We present a domain specific language (DSL) for the programming part, and a constraint programming approach to scheduling with memory allocation. Our experiments on implementing a kernel extracted from a DSP appli- cation on an example reconfigurable custom architecture shows that it is possible to achieve performance close to hand-written machine code that is scheduled without memory allocation.

• Author: Mehmet Ali Arslan; Krzysztof Kuchcinski; Flavius Gruian; Yangxurui Liu
• Editor: Pavan Balaji; Minyi Guo; Zhiyi Huang
• Department/s: Department of Computer Science; Department of Electrical and Information Technology; ELLIIT: the Linköping-Lund initiative on IT and mobile communication; Parallel Systems
• Publishing year: 2015
• Language: English
• Pages: 49-57
• Publication/Series: Proc. PPoPP, Principles and Practice of Parallel Programming
• Links: http://dx.doi.org/10.1145/2712386.2712399
• Document type: Conference paper
• Publisher: Association for Computing Machinery (ACM)
• Topic: Computer Science; Electrical Engineering, Electronic Engineering, Information Engineering
• Conference name: PMAM 2015: The 6th International Workshop on Programming Models and Applications for Multicores and Manycores in conjunction with PPoPP 2015, 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel
• Conference date: 2015-02-07 - 2015-02-11
• Conference place: San Francisco, CA, United States
• Status: Published
• Project: High Performance Embedded Computing
• Research group: Digital ASIC; ESDLAB
• ISBN/ISSN/Other: ISBN: 978-1-4503-3404-4